System Level Design (SLD) and Electronic System Level (ESL) Design are buzzwords of todayГўs Electronic Design Automation (EDA) industry. The idea is to raise the level of abstraction of design entry for future hardware systems beyond the register transfer level (RTL). This is necessitated by the increasing complexity of the systems, the immense gate count available on a single chip, the relatively slower growth in designer productivity, and decreasing design turn around time. Even though a number of languages and design environments have been proposed in the last few years which includes SystemC, Bluespec, SpecC, and System Verilog, none of these satisfy our wish list for a successful system level design language or framework. We want to model heterogeneous system-on-chips (SoCs) which can be based captured by a language capable of expressing and co-simulating multiple models of computation. We want to model behavior rather than structure, and want our SLD languages to support simulation of behavioral hierarchy, rather than structural ones available in the existing languages. We also want easier integration of frameworks and tools from various vendors and open source tools that not only supports design, verification, dynamic waveform viewing, coverage driven dynamic test generation within the same framework, we want to dynamically enable or disable some of the tools from the integrated framework to speed up simulation as needed. We also want open source Eclipse plug-in for SystemC or similar ESL languages. We want ability for dynamic reflection and introspection from a running simulation to provide us with information about simulation state and accordingly generate tests dynamically to fulfill coverage goals.<EM>Ingredients for Successful System Level Design Automation Methodologydiscusses these wish lists, provides detailed discussions on how our prototype implementations provide us with these much desired features.
Ingredients for Successful System Level Design Methodology
Hiren D. Patel ¢ Sandeep K. Shukla
Ingredients for Successful System Level Design Methodology
Dr. Hiren D. Patel Electrical Engineering and Computer Science University of California, Berkeley 545K Cory Hall Berkeley CA 94720 USA
[email protected]
ISBN 978-1-4020-8471-3
Dr. Sandeep K. Shukla Department of Electrical and Computer Engineering Virginia Tech 340 Whittemore Hall Blacksburg VA 24061 USA
[email protected]
e-ISBN 978-1-4020-8472-0
Library of Congress Control Number: 2008927073 All Rights Reserved c 2008 Springer Science+Business Media B.V. No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Printed on acid-free paper 9 8 7 6 5 4 3 2 1 springer.com
To those affected by April 16, 2007, the Blacksburg and Virginia Tech. community, the friends and families, and all our fellow Hokies. Hiren D. Patel and Sandeep K. Shukla February 3, 2008
Preface
ESL or “Electronic System Level” is a buzz word these days, in the electronic design automation (EDA) industry, in design houses, and in the academia. Even though numerous trade magazine articles have been written, quite a few books have been published that have attempted to define ESL, it is still not clear what