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IEEE Design & Test of Computers offers original works describing tools, techniques, concepts, and systems used to design and test electronic product hardware and supportive software. The magazine focuses on current and near-future practice, and includes tutorials, how-to-articles, and real-world case studies.
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Call for Papers Special Issue on Design and Test of RFIC Chips Guest Editors: Bruce Kim and Craig Force The wireless electronics market has been growing rapidly in conjunction with computer, automotive, biomedical, and military applications. RF integratedcircuit (IC) chips in these areas require greater density, higher speed, lower power, lower cost, and better reliability. However, designing and testing RFIC chips is becoming increasingly more complicated and challenging. In fact, the process of integrating RFICs into SoCs and systems in package (SiPs) has caused a major bottleneck in the production of high-performance systems. Although considerable research is underway to reduce the design and test overhead for RFIC chips, this bottleneck remains the major obstacle to efficient RFIC chip product manufacturing. Therefore, the most critical challenge in creating R