Run-time Adaptation for Reconfigurable Embedded Processors by: Lars Bauer Jörg Henkel Embedded processors are the heart of embedded systems. Reconfigurable embedded processors comprise an extended instruction set that is implemented using a reconfigurable fabric (similar to a field-programmable gate array, FPGA). This book presents novel concepts, strategies, and implementations to increase the run-time adaptivity of reconfigurable embedded processors. Concepts and techniques are presented in an accessible, yet rigorous context. A complex, realistic H.264 video encoder application with a high demand for adaptivity is presented and used as an example for motivation throughout the book. A novel, run-time system is demonstrated to exploit the potential for adaptivity and particular approaches/algorithms are presented to implement it. •Presents a new approach to increase the adaptivity of embedded processors; •Describes a novel approach to increasing the adaptivity for reconfigurable processors, explained in a very visual/imaginable manner, as well a very precise/formal manner; •Presents a complex, realistic H.264 video encoder application with a high demand for adaptivity and uses that example for motivation/in-depth evaluation throughout the book; •Describes a novel run-time system that exploits the potential for adaptivity and particular approaches/algorithms to implement it.
Run-time Adaptation for Reconfigurable Embedded Processors
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Lars Bauer Jörg Henkel ●
Run-time Adaptation for Reconfigurable Embedded Processors
Lars Bauer Karlsruhe Institute of Technology Haid-und-Neu-Str. 7 76131 Karlsruhe Germany
[email protected]
Jörg Henkel Karlsruhe Institute of Technology Haid-und-Neu-Str. 7 76131 Karlsruhe Germany
ISBN 978-1-4419-7411-2 e-ISBN 978-1-4419-7412-9 DOI 10.1007/978-1-4419-7412-9 Springer New York Dordrecht Heidelberg London © Springer Science+Business Media, LLC 2011 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
Contents
1 Introduction................................................................................................ 1.1 Application-Specific Instruction Set Processors................................. 1.2 Reconfigurable Processors.................................................................. 1.2.1 Summary of Reconfigurable Processors................................. 1.3 Contribution of this Monograph......................................................... 1.4 Monograph Outline.............................................................................
1 2 3 4 5 6
2 Background and Related Work................................................................ 2.1 Extensible Processors.......................................................................... 2.2 Reconfigurable Processors.................................................................. 2.2.1 Granularity of the Reconfigurable Fabri