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This book presents a "compiler-in-the-loop" exploration strategy for alternative memory architectures, allowing for effective matching of the target application to the processor-memory architecture. This new approach for memory architecture exploration replaces the traditional black-box view of the memory system. The utility of the approach is illustrated for a set of large, real-life benchmarks. Material is of interest to different groups in the embedded systems-on-chip field, including researchers and students in memory architecture, CAD developers, and system designers. Grun is affiliated with the Center for Embedded Computer Systems, University of California-Irvine. Annotation (c)2003 Book News, Inc., Portland, OR"
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Memory Architecture Exploration for Programmable Embedded Systems This page intentionally left blank MEMORY ARCHITECTURE EXPLORATION FOR PROGRAMMABLE EMBEDDED SYSTEMS PETER GRUN Center for Embedded Computer Systems, University of California, Irvine NIKIL DUTT Center for Embedded Computer Systems, University of California, Irvine ALEX NICOLAU Center for Embedded Computer Systems, University of California, Irvine KLUWER ACADEMIC PUBLISHERS NEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW eBook ISBN: Print ISBN: 0-306-48095-6 1-4020-7324-0 ©2002 Kluwer Academic Publishers New York, Boston, Dordrecht, London, Moscow Print ©2003 Kluwer Academic Publishers Dordrecht All rights reserved No part of this eBook may be reproduced or transmitted in any form or by any means, electronic, mechanical, recording, or otherwise, without written consent from the Publisher Created in the United States of America Visit Kluwer Online at: and Kluwer's eBookstore at: http://kluweronline.com http://ebooks.kluweronline.com Contents List of Figures List of Tables Preface